Xilinx Spartan-3 FPGAs xc3s400 uClinux board has quite a complex structure, but such studies are rare on the web are in pdf format, circuit diagram, pcb drawings have Xilinx XC3S400 FPGA & XCF02SV020C Flash Platform 8MB Flash ROM 32MB...Electronics Projects, uClinux Xilinx Fpga Spartan Board "avr development board, " Date 2019/08/02
Xilinx Spartan-3 FPGAs xc3s400 uClinux board has quite a complex structure, but such studies are rare on the web are in pdf format, circuit diagram, pcb drawings have
Xilinx XC3S400 FPGA & XCF02SV020C Flash Platform 8MB Flash ROM 32MB SRAM PCM3008 Stereo Audio Codec digital volume control, Hi-Q 8 Port ADC UART FTDI USB 2.0 SD Card Slot B expansion bus interface Switched-mode Power Supply 3.3v & 1.2v Negative 3.3V supply switching Four user LEDs, the program button and JTAG port
Preliminary schematics and PCB artwork are completed for an 400K gate FPGA board capable of running Linux. Features inclu de 8Mb Flash, 32MB SRAM, sound codec, SD Slot and USB. I have completed the schematics and PCB routing but I have not yet tested the design beyond some spice modeling.
The honest truth is I can’t afford to take the typical 3 or more revisions to corrent any mistakes I might have in the design when each iteration costs about 600$. I have chosen to wait a little longer until my CNC machine can route decent circuits and then proceed to test the circuits seperately. This should validate at least 90% or more of the board and provide confidence it won’t end up as pcb jewelery!
I have included schematics and PCB files so that you may possibly benefit from the schematics in their current state. Perhaps you may even find an error so please check my work and let me know. Finally, perhaps someone out there has the capability to cheaply create 4-layer PCBs so that together we can validate the design and share the results.
The schematics and PCB layout can be found in the PDF document at the bottom of this article.
This design has been scaled down from more complex schematics to speed time to production. Further enhancement of the design will continue as the project matures. Here are some notes concerning current state and future plans of this project:
User IO is not yet included in the design but will before the first production manufacture of PCBs. All unmapped FPGA and ADC pins will be brought out to a user header.
The ADC was originally intended for self-diagnostic such as current and voltage measurement, temperature and battery levels (eventually). It remains in the schematics although all self-diagnostic circuitry was removed. It was decided that a small Atmel programmable IC will be used later for the self-diagnostic and battery charge monitor.
The Atmel programmable IC will also be used to quickly program the FPGA via USB or load from a file on the SD Card. JTAG will always be available.